info@PortalDerWirtschaft.de | 02635/9224-11
Suchmaschinenoptimierung
mit Content-Marketing - Ihre News
Synopsys, Inc. |

Synopsys Delivers Unified Solution for Digital and Custom SoC Designs

Bewerten Sie hier diesen Artikel:
0 Bewertungen (Durchschnitt: 0)


STMicroelectronics Reports 2X Productivity Advantage Over Existing ECO Flow with Integration of IC Compiler and Galaxy Custom Designer


Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced advances in its Galaxy(TM) Implementation Platform with the availability of its unified...

Mountain View, Calif., 26.09.2011 - Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced advances in its Galaxy(TM) Implementation Platform with the availability of its unified solution for mixed-signal designs. The new unified solution provides seamless integration between IC Compiler physical implementation and the Galaxy Custom Designer® solution, allowing design teams to easily move between digital and custom implementation flows while maintaining design data integrity. The unified solution accelerates the design development cycle by enabling quick and reliable custom edits to IC Compiler designs at any stage of development, including the time-critical tapeout phase.

"To manage complexity and reduce the development times of our mixed-signal designs, we need a unified methodology for digital and analog implementation," said Didier-Jerome Martin, physical implementation manager at STMicroelectronics' Microcontroller Division. "Using Synopsys' unified physical implementation solution on a 32-bit microcontroller design we reduced the cycle time by 25 percent from initial floorplanning to final tapeout, as compared to our previous flow. We also experienced a 2X productivity gain when performing late-stage layout ECOs, at a time in the project when schedules were compressed and time was at a premium."

Traditionally, digital place-and-route users have had to manually transfer their designs to a non-integrated custom editing tool to make analog-style changes. This method sacrifices productivity, introduces the risk of losing metadata in the process, and lacks the ability to readily assess the impact of custom edits on the overall design. The new unified IC Compiler and Custom Designer solution provides a powerful capability to perform custom editing of IC Compiler designs throughout the physical implementation flow, including floorplanning, placement, clock tree synthesis, routing and chip finishing. Virtually no setup is required, and the lossless, multi-roundtrip capability gives users a high degree of flexibility to make custom edits to the design while ensuring that all changes are reflected back into IC Compiler.

IC Compiler customers can now take advantage of Custom Designer's advanced productivity features such as SmartDRD technology for design-rule-driven layout, interactive point-to-point auto-routing, and automation technologies such as auto-bus and auto-via generation. All this comes with push-button access to the same IC Validator physical verification and StarRC(TM) parasitic extraction tools used with IC Compiler, providing designers with a unified physical implementation solution.

"Designing today's digital and mixed-signal SoCs involves multiple iterations between digital and custom implementation," said Bijan Kiani, vice president of product marketing at Synopsys. "The new innovations in the Galaxy Platform provide the capabilities needed by design teams to manage the increased complexity and aggressive development schedules of complex mixed-signal designs."

Synopsys will premiere a webinar entitled "Use IC Compiler and Custom Designer to Shave Weeks Off Your SoC Development Cycle" on October 19, 2011 at 10:00 a.m. (PT) that will showcase the seamless integration between IC Compiler and Custom Designer. Visit http://www.customdesigner.com to view a video demonstration and learn more about the IC Compiler and Custom Designer solution.


Für den Inhalt der Pressemitteilung ist der Einsteller, PresseBox.de, verantwortlich.

Pressemitteilungstext: 488 Wörter, 3561 Zeichen. Als Spam melden


Kommentare:

Es wurde noch kein Kommentar zu diesem Thema abgegeben.



Ihr Kommentar zum Thema





Weitere Pressemitteilungen von Synopsys, Inc. lesen:

Synopsys, Inc. | 26.06.2012

Virtualizer von Synopsys beschleunigt Software-Entwicklung und erleichtert Entwurf von Systemen auf Basis der AURIX- Mikrocontroller-Familie von Infineon

München, Deutschland / Mountain View, Kalifornien, 26.06.2012 - .- Synopsys' Virtualizer ermöglichte die rasche Erstellung eines virtuellen Prototypen für die AURIX-Familie von Multicore-Automotive-Mikrocontrollern.- Infineon nutzte virtuelle AURI...
Synopsys, Inc. | 28.03.2012

Synopsys präsentiert das industrieweit erste vollständige Audio-IP-Subsystem

München Deutschland / Mountain View, Kalifornien, 28.03.2012 - .Highlights:- Vorverifiziertes Hardware- und Software-Subsystem reduziert den Entwurfs- und Integrationsaufwand, verringert das Entwurfsrisiko und verkürzt die Produkt-einführungszeit ...
Synopsys, Inc. | 06.03.2012

Synopsys stellt Verification-IP der nächsten Generation für schnellere SoC-Verifikation vor

Mountain View CA/MÜNCHEN, 06.03.2012 - .- Synopsys Discovery-VIP beschleunigt und vereinfacht die Verifikation der komplexesten System-on-Chip-(SoC)-Designs.- Synopsys Discovery-VIP bietet höhere Performance, Debugging- und Coverage-Features, einfa...